1. Field of the Invention
This invention relates generally to low noise amplifiers having operatively digitally controllable gain. Specifically, the invention relates to digitally controllable variable-gain amplifiers and more particularly to such amplifiers used in ultrasound imaging.
2. Description of the Related Art
Variable-gain amplifiers (VGA) have been used for many years in a wide variety of applications including communication and ultrasound imaging.
In communication, a transmitter transmits a radio frequency modulated signal over a transmission channel to a receiver. When receiving, the signal level may vary due to various propagation phenomena. Similarly, medical ultrasound imaging systems are alternatively transmitting high-frequency ultrasonic pulses and processing the returned echoes. Propagating through a medium, the intensity of acoustic waves is attenuated with distance traveled. To compensate for the diminishing echo strength, most ultrasound scanners are aimed to elevate the receiver gain as echoes are received from deeper structures.
There are various known techniques for programming gain of an operational amplifier by switching the input and feedback resistors of various values. Unfortunately, use of these resistors induces an additional noise.
US Statutory Invention No. H965 entitled “Differential Amplifier with Digitally Controlled Gain” discloses a programmable gain differential amplifier having multiple sets of gain-setting resistors in the emitters of a differential transistor pair. The amplifier gain is controlled by selecting a resistor set or combination of resistor sets. Consequently, a programmable gain amplifier of this kind contributes more noise than the basic differential amplifier without emitter resistors.
A common method of gain control in prior art ultrasound front-end integrated circuits is based on progressively decreasing an initial signal attenuation, which is introduced at the start of transmission. By way of example, such a technique is disclosed in U.S. Pat. Nos. 5,077,541, 5,684,431, and 6,229,375. FIG. 1 depicts a typical block-diagram of a variable gain amplifier (VGA) operative to control the echo signal attenuation. This VGA comprises an attenuation means 102 arranged as a multi-section R-2R ladder network, a plurality of transconductance cells 104, a gain interpolator 106, a control port 108, an input port 110, and a post-amplifier 112.
In operation, a received echo signal applied to the port 110 feeds the ladder network 102. The ladder nodes in the network 102 provide respective output points which deliver progressively lower output signals. The effective “tap” point of this attenuator is continuously interpolated between and along the ladder by the interpolator 106 in response to an analog control signal applied to the control port 108. After that, the post-amplifier 112 brings the signal up to a level sufficient to properly drive an analog-to-digital converter. As explained below, a problem with the VGA of FIG. 1 is the signal-to-noise ratio (SNR) degradation in Doppler modalities.
In ultrasound color flow imaging, Doppler signals are combined with the echoes returned from stationary or slowly moving tissue commonly referred as clutter. The clutter signal tends to have a significantly higher strength as compared to the weak signals from blood cells. A typical range of the clutter-to-signal ratio is 40-100 dB.
Since large stationary signals are superimposed by Doppler components, the signal attenuation produced by the ladder network 102 would affect the flow signals as well. For instance, if an area of interest is located in close proximity to the patient's skin, the ladder network 102 is set to the maximum attenuation of typically 30 dB. Consequently, the blood flow components, which are inherently small, would be weakened further so that the signal may be buried in the combined noise produced by the ladder network 102 and post-amplifier 112.
U.S. Pat. No. 7,425,866 entitled “Digitally Adjusted Variable Gain Amplifier (VGA) Using Switchable Differential Pairs” discloses a VGA that includes a plurality of cascaded stage, each stage having a set of switchable differential pairs. Said VGA circuitry uses an interleaved thermometer coding method to adjust the gain. While the thermometer coding provides monotonic gain adjustment and almost uniform step size, it requires k+1 control signal lines operative to enable or disable at least k+1 differential pairs per stage; k is the maximum gain of a stage.
A modern ultrasound scanner may have up to 512 identical receive channels, each requiring a VGA. Functionally, the above described VGA is suitable for implementation in ultrasound. However, since the circuitry is noticeably complex, it would result in high manufacturing cost and substantial power consumption.
U.S. Pat. No. 7,151,409 entitled “Programmable Low Noise Amplifier and Method” discloses a programmable gain amplifier using a minimum number of gain control lines. FIG. 2 illustrates one embodiment of the invention comprising a tail current generator 202, a switch selector 204, a differential input port 206, a differential output port 208, a plurality of transistor pairs, a plurality of switch transistors for selective coupling the sources of said transistor pairs to said tail current generator, 202, and two load resistors RL. The programmable gain amplifier of FIG. 2 operates as follows:
There are four transistor pairs Q5/6, Q7/8, Q9/10, and Q11/12 sharing a current I0 provided by a tail current generator 202. Switch transistors Q1, Q2, Q3, and Q4 are operative to connect the tail current generator 202 to a selected transistor pair or any combination of these pairs; said transistor pairs Q5/6, Q7/8, Q9/10, and Q11/12 have different transconductance values, which progressively increase in that order.
As is well known, the voltage gain of a transistor pair is proportional to its transconductance gm. Thus, if the switch selector 204 would turn on only one of N switch transistors at a time, one of the N values of gain G=gm·RL can be obtained. Consequently, this scheme of gain setting is rather coarse.
Recognizing the need for fine gain resolution, the above-referred patent teaches “to simultaneously turn on more than one of the switch transistors to achieve the desired gain”. However, the subsequent analysis shows that the proposed technique comes to only adding few predetermined gain values.
For small input signals, the transconductance of a differentially driven, source-coupled MOS transistor pair is given by:gm=√{square root over (2·β·ISS)}  (1)                where β=kW/L is the transconductance parameter, k is the intrinsic or process parameter, W and L are channel width and length, respectively, and ISS is the differential pair's bias current.        
Operating in small signals conditions, the drain currents of the pair transistors fluctuate around ISS/2. On the other hand, the drain current, ID, is defined as:
                              I          D                =                              β            2                    ⁢                                    (                                                V                  GS                                -                                  V                  T                                            )                        2                                              (        2        )                            where VGS is the gate-source voltage, VT is the threshold voltage. Given ID=ISS/2, the required gate-source voltage yields:        
                              V          GS                =                              V            T                    +                                                    I                SS                            β                                                          (        3        )            
Assume that two transistor pairs, for instance Q5/6 and Q7/8, are simultaneously enabled. This results in splitting the bias current I0 so that most of the bias current I0 flows into the sources of the pair having lower input resistance. That is, if I1 and I1 are the bias currents of respective pairs of transistors Qn/Qn+1, their sum is equal to bias current I0 or I2=I0−I1.                Let AR1=W1/L1 and AR2=W2/L2 respectively denote the transistor aspect ratio of the pairs associated with said partial bias currents I1 and I2. Since the gate-source voltages VGS of Q5 and Q7 as well as Q6 and Q8 are equal, Equation 3 leads to:I1/AR1=I2/AR2  (4)        Substituting I2=I0−I1 in Equation 4 yields:        
                              I          ⁢                                          ⁢          1                =                  I          ⁢                                          ⁢          0          ⁢                                    AR              ⁢                                                          ⁢              1                                                      AR                ⁢                                                                  ⁢                1                            +                              AR                ⁢                                                                  ⁢                2                                                                        (        5        )                                          I          ⁢                                          ⁢          2                =                  I          ⁢                                          ⁢          0          ⁢                                    AR              ⁢                                                          ⁢              2                                                      AR                ⁢                                                                  ⁢                1                            +                              AR                ⁢                                                                  ⁢                2                                                                        (        6        )            
The obtained formulas allow calculating small-signal transconductance of the two enabled differential pairs by combining Equations 1, 7, and 8. Simple manipulations give:
                              g                      m            ⁢                                                  ⁢            1                          =                                                            2                ·                k                ·                AR                            ⁢                                                          ⁢                              1                ·                I                            ⁢                                                          ⁢              1                                =                      AR            ⁢                                                  ⁢                          1              ·                                                                                          2                      ·                      k                      ·                      I                                        ⁢                                                                                  ⁢                    0                                                                              AR                      ⁢                                                                                          ⁢                      1                                        +                                          AR                      ⁢                                                                                          ⁢                      2                                                                                                                              (        7        )                                          g                      m            ⁢                                                  ⁢            2                          =                                                            2                ·                k                ·                AR                            ⁢                                                          ⁢                              2                ·                I                            ⁢                                                          ⁢              2                                =                      AR            ⁢                                                  ⁢                          2              ·                                                                                          2                      ·                      k                      ·                      I                                        ⁢                                                                                  ⁢                    0                                                                              AR                      ⁢                                                                                          ⁢                      1                                        +                                          AR                      ⁢                                                                                          ⁢                      2                                                                                                                              (        8        )            
Referring to FIG. 2, all differential pairs are driven by the same input signal and have common load resistors. Thus, enabling two pairs, the resulting voltage gain, GSUM, becomes:GSUM=RL·(gm1+gm2)=RL·√{square root over (2·k·(AR1+AR2)·I0)}  (9)
It is instructive to compare the value of Gsum with the voltage gains G1 and G2 that are expected if only one of the two above mentioned pairs Q5/6 and Q7/8 is turned on. Following Equation 1, these gains are:
                              G          1                =                              R            L                    ·                                                    2                ·                k                ·                AR                            ⁢                                                          ⁢                              1                ·                I                            ⁢                                                          ⁢              0                                                          (        10        )                                          G          2                =                              R            L                    ·                                                    2                ·                k                ·                AR                            ⁢                                                          ⁢                              2                ·                I0                                                                        (        11        )            
Assume further that AR2>AR1, i.e., G2>G1 and only the pair with lager aspect ratio is turned on. In such a case, the obtained relative increase in gain, Δ, is given by:
                    Δ        =                                                            G                SUM                                            G                2                                      -            1                    =                                                    1                +                                                      AR                    ⁢                                                                                  ⁢                    1                                                        AR                    ⁢                                                                                  ⁢                    2                                                                        -            1                                              (        12        )            
Since AR2>AR1, the above result can be represented by a Maclaurin series, which yields:
                    Δ        ≈                              AR            ⁢                                                  ⁢            1                                              2              ·              AR                        ⁢                                                  ⁢            2                                              (        13        )            
To illustrate the degree of gain variation caused by turning on more than one differential pair, we will use the exemplary values of the W/L ratios and gains, which are listed in the above-referred patent. For example, the W/L ratios of the Q5/6 and Q7/8 pairs are 180/0.5 and 800/0.5, respectively. Consequently, enabling the Q5/6 pair in addition to the Q7/8 provides an 11% increase as compared with the inherent Q7/8 gain of 5.
In order to characterize the obtained results, one needs to take in to account that the next gain transition (i.e., solely enabling of the Q9/10 pair) results in gain of 10. In other words, the initial gain step of 10−5=5 has been reduced to 4.5. Thus, while enabling more than one of transistor pairs in a time increases the amount of available gain values, the obtained enchantment is relatively small and takes place at limited points of the entire gain range. Therefore, there is still a need in a low noise, programmable gain amplifier providing high gain resolution and adapted to new sub-micron technologies.